The present disclosure relates to methods for fabricating a semiconductor device, and more particularly relates to a method for fabricating a multilayer interconnect structure.
In recent years, with miniaturization of semiconductor integrated circuit devices, the spacing between an adjacent pair of interconnects providing connection between devices and disposed in a device has been narrowed. Thus, a problem where the capacitance between interconnects increases, and the propagation speed of a signal decreases is occurring. To address this problem, a method has been actively studied in which the capacitance between interconnects is reduced by using, e.g., a silicon oxycarbide (SiOC) film having a low dielectric constant as an insulating film.
Generally, the SiOC film tends to be altered by a process. Thus, instead of a process in which a conventional resist mask is used, a process in which a hard mask made of, e.g., a titanium nitride (TiN) film is used has been suggested (see, for example, Japanese Patent Publication No. 2003-100871).